[svlug] RISC-V (Esperanto 4096 cores on 7nm) still alive

Ivan Sergio Borgonovo mail at webthatworks.it
Sat Jan 6 02:46:54 PST 2018

On 01/06/2018 06:18 AM, Karen Shaeffer wrote:
> On Tue, Jan 02, 2018 at 10:19:17PM +0100, Ivan Sergio Borgonovo wrote:
>> https://fuse.wikichip.org/news/686/esperanto-exits-stealth-mode-aims-at-ai-with-a-4096-core-7nm-risc-v-monster/
> Hi Ivan,
> Thanks for the RISC-V link.
> https://www.youtube.com/watch?v=f-b4QOzMyfU (Key point is at 9:26 ~ 9:58)
> https://www.youtube.com/watch?v=5Acl-12cHUM (Key point is at 18:35 ~ 19:48)

I didn't have the patience to watch them all.
One thing that I found fascinating is that they plan to use the same 
risc-v core as a shader and that at this point, for machine learning, 
they think it is better to change algorithms on a common ISA than adding 
optimization in hardware (but still the cpu will support extensions).

Ivan Sergio Borgonovo
https://www.webthatworks.it https://www.borgonovo.net

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